Description - ASIC and FPGA Verification by Richard Munden
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs. *Provides numerous models and a clearly defined methodology for performing board-level simulation. *Covers the details of modeling for verification of both logic and timing. *First book to collect and teach techniques for using VHDL to model "off-the-shelf" or "IP" digital components for use in FPGA and board-level design verification.
Buy ASIC and FPGA Verification by Richard Munden from Australia's Online Independent Bookstore, Boomerang Books.
(235mm x 191mm x mm)
Morgan Kaufmann Publishers In
Publisher: Elsevier Science & Technology
Country of Publication:
Book Reviews - ASIC and FPGA Verification by Richard Munden
Author Biography - Richard Munden