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Description - ASIC and FPGA Verification by Richard Munden

Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today's digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

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Book Details

ISBN: 9780125105811
ISBN-10: 0125105819
Format: Paperback
(235mm x 190mm x 23mm)
Pages: 336
Imprint: Morgan Kaufmann Publishers In
Publisher: Elsevier Science & Technology
Publish Date: 23-Oct-2004
Country of Publication: United States

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Author Biography - Richard Munden

By Richard Munden